1. Field of the Invention
The present invention relates to semiconductor devices and the fabrication thereof. More particularly, the present invention pertains to RuSixOy-containing adhesion layers, structures incorporating such adhesion layers, and methods of fabricating the same.
2. State of the Art
Integrated circuits typically include various conductive layers. For example, in the fabrication of semiconductor devices, such as dynamic random access memories (DRAMs) and static random access memories (SRAMs), conductive materials (e.g., electrode materials such as Pt and Ru) are typically expected to be used in the formation of storage cell capacitors and interconnection structures (e.g., conductive layers in contact holes, vias, etc.). In integrated circuits, conductive materials may require some sort of adhesion layer in order to prevent delamination of the films. In forming such integrated circuit structures, the adhesion layer must be able to withstand the various anneals performed on the capacitor electrode and dielectric. The adhesion of grown and deposited films used in semiconductor processing must be excellent both as deposited and after subsequent processing. If films lift from the substrate device, failure can result, leading to potential reliability problems. For example, failure of the adhesive can result in fracture of the mechanical bond (e.g., die separation) or failure of the circuit by degradation (e.g., contamination or loss of thermal or electrical properties) and could preclude the use of the desired film.
Use of various adhesive layers is known in the art. For example, in silicon devices having small diameter contact holes and tungsten filling the contact holes, tungsten is typically used as a contact fill material, which requires the use of an underlying contact layer as well as an underlying adhesion layer. The contact layer is needed to provide both good ohmic contact to the silicon device, and also serves as an adhesion layer between the tungsten fill and the sides of a silicon oxide contact hole. Titanium is usually used for this purpose, providing good ohmic contact, after centering converts titanium to titanium disilicide at the bottom of the contact hole. However, where only a titanium adhesive layer is used, the subsequent tungsten chemical vapor deposition process severely damages the exposed titanium. The tungsten deposition is performed via the decomposition of tungsten hexafluoride, and in addition to the deposition of tungsten, a serious reaction with titanium occurs, eroding the critical contact and adhesive layer. To overcome the titanium erosion phenomena, an adhesion layer of either sputtered tungsten or titanium nitride on the titanium layer has been suggested. For example, U.S. Pat. No. 5,286,675 describes a process in which a titanium-titanium nitride composite is used in contact holes prior to filling with tungsten. However, that process does not sufficiently eliminate the attack of titanium, particularly where poor titanium nitride coverage exists. The lack of adequate titanium nitride coverage leads to erosion of the underlying titanium adhesive layer during the subsequent tungsten deposition process, resulting in a lack of tungsten adhesion, which is described as xe2x80x9ctungsten peelingxe2x80x9d or the xe2x80x9cvolcano effect.xe2x80x9d
Adhesion layers have also been employed for providing adhesion between a substrate and overlying seed layers in metallization areas of substrates. For example, U.S. Pat. No. 5,126,016 provides a chromium adhesion layer for thin-film microelectronic circuitry. However, the metallization of high aspect ratio thin-film structures cause high stress which may lead to adhesions failure, as described above.
Various metals and metallic compounds (e.g., metals such as platinum and conductive metal oxides such as ruthenium oxide) have been proposed for use as electrodes or as electrode stack layers with high dielectric constant materials. However, such electrical connections must be constructed so as to not diminish the beneficial properties of the high-dielectric constant materials. For example, in order for platinum or ruthenium oxide to function well as a bottom electrode or as one of the layers of an electrode stack, an oxidation-resistant barrier layer and adhesive layer are typically required. These layers, either as a combined layer or as individual layers, must provide adhesion between a substrate and deposited layers and prevent oxidation of silicon located at the surface of the electrode stack during the oxygen anneal of the high dielectric constant materials (e.g., Ta2O5 or BaSrTiO3), which oxidation can result in a decreased series capacitance and, in turn, degradation of the storage capacity of the cell capacitor. Similarly, O2 diffusing through the platinum or RuO2 to the underlying Si yields SiO2 at the base of the electrode, thus decreasing series capacitance. Platinum and ruthenium oxide, when used alone as an electrode and adhered to, are generally too permeable to oxygen and silicon to be used as a bottom electrode of a storage cell capacitor formed on a silicon substrate region.
In view of the aforementioned shortcomings of the methods and structures being currently practiced, it would be advantageous to provide an adhesion layer that prevents delamination of deposited films contacting the same, withstands the various anneals performed on the capacitor electrode and dielectric, maintains the performance of high dielectric capacitors, prevents oxidation of underlying Si contacts, and prevents Si diffusion into an electrode or dielectric. It would be of further advantage to form an adhesion layer that can survive a tape test both as deposited and after an annealing step and that reduces or eliminates the diffusion or migration of ruthenium into an elemental Si or a silicide layer, or vice versa, which typically occurs as a result of the high solubility of silicon in ruthenium.
The present invention provides RuSixOy-containing adhesion layers, along with structures incorporating such adhesion layers and methods of fabricating the same.
A method of fabricating semiconductor devices and assemblies (e.g., integrated circuits) according to the present invention includes providing a substrate assembly having a surface. An adhesion layer is formed over at least a portion of the surface. The adhesion layer includes RuSixOy, where x and y are in the range of about 0.01 to about 10. The adhesion layer may, additionally, include Ru and/or RuSix. In one particular embodiment of the method, the adhesion layer is formed of RuSixOy, where x is in the range of about 0.1 to about 3, and more preferably is about 0.4, and where y is in the range of about 0.01 to about 0.1, and more preferably is about 0.05.
In another embodiment of the method, the adhesion layer is formed by depositing a mixed film of Ruxe2x80x94RuSixxe2x80x94RuSixOy by chemical vapor deposition (CVD). In yet another embodiment of the method, the adhesion layer is formed by CVD deposition of Ruxe2x80x94RuSixOy in an oxidizing atmosphere, such as O2, N2O, O3, or any other suitable inorganic or organic oxidizer. All of the foregoing adhesion layers may also be formed by atomic layer deposition. This process can result in the formation of multiple (preferably up to 300) RuSixOy-containing diffusion adhesion monolayers and, more preferably, formation of from three to five monolayers of RuSixOy-containing adhesion layers.
In an alternative embodiment, the adhesion layer is formed by physical vapor deposition (PVD) of the adhesion layers of the present invention. In one particular embodiment of the PVD deposition method, mixed films of Ruxe2x80x94RuSixxe2x80x94RuSixOy are deposited to form an adhesion layer. Alternatively, mixed films of Ruxe2x80x94RuSixOy may be deposited to form an adhesion layer.
According to yet another method of the present invention, a capacitor is formed by providing a silicon-containing region of a substrate assembly. A first electrode is then formed on at least a portion of the silicon-containing region of the substrate assembly. The first electrode includes an adhesion layer having RuSixOy, where x and y are in the range of about 0.01 to about 10. A high dielectric material is then formed over at least a portion of the first electrode and a second electrode is provided over the high dielectric material. The second electrode may also include an adhesion layer having RuSixOy, where x and y are in the range of about 0.01 to about 10.
In an alternative embodiment of the method, one or more conductive layers are formed relative to the RuSixOy-containing adhesion layer. The one or more conductive layers are formed of at least one of a metal or a conductive metal oxide, e.g., formed from materials selected from the group of RuO2, RhO2, MoO2, IrO2, Sr RuO3, Ru, Rh, Pd, Pt, and Ir.
A semiconductor device structure according to the present invention includes a substrate assembly including a surface and an adhesion layer over at least a portion of the surface. The adhesion layer is formed of RuSixOy, where x and y are in the range of about 0.01 to about 10.
In one embodiment of the structure, at least a portion of the surface is a silicon-containing surface and the structure includes one or more additional conductive layers over the adhesion layer formed of at least one of a metal and a conductive metal oxide, e.g., formed from materials selected from the group of RuO2, RhO2, MoO2, IrO2, Ru, Rh, Pd, Pt, and Ir.
Semiconductor assemblies and structures according to the present invention are also described. One embodiment of such a structure includes a capacitor structure having a first electrode, a high dielectric material on at least a portion of the first electrode, and a second electrode on the dielectric material. At least one of the first and second electrodes includes an adhesion layer formed of RuSixOy, where x and y are in the range of about 0.01 to about 10.
Another such structure is an integrated circuit including a substrate assembly including at least one active device and a silicon-containing region. An interconnect is formed relative to the at least one active device and the silicon-containing region. The interconnect includes an adhesion layer on at least a portion of the silicon-containing region. The adhesion layer is formed of RuSixOy, where x and y are in the range of about 0.01 to about 10.